Course Overview

Introduction : System vs Embedded Systems; SOC design challenges, SOC modelling, Hardware Software partitionning.
System on programmable chip Architectures
SOPC design flow
Applications

http://esisar.grenoble-inp.fr/en/academics/advanced-processor-architecture-and-soc-design-5amce514

Learning Achievement

Competence

To be able to choose and to exploit the more appropriate processor architecture for a given application.
To be familliar with SOC design techniques and challenges

Course prerequisites

- Digital design (VHDL or Verilog; FPGA design)
- Embedded software Programming (C; Assembly Language)
- Processor Architecture (RISC Architecture, ARM processor)

Grading Philosophy

Exam 1h30 + Labs

Course schedule

Course type

Lecture

Online Course Requirement

Instructor

David HELY

Other information

Course content can evolve at any time before the start of the course. It is strongly recommended to discuss with the course contact about the detailed program.

Please consider the following deadlines for inbound mobility to Grenoble:
- April 1st, 2020 for Full Year (September to June) and Fall Semester (September to January) intake ;
- September 1st, 2020 for Spring Semester intake (February – June).

Site for Inquiry