Vlsi Testing National Taiwan University
Course Overview
Overview Logic simulation Fault modeling Fault simulation Testability analysis Combinational ATPG Sequential ATPG Delay fault testing Diagnosis Design for Testability Built-in Self Test
Learning Achievement
provide basic knowledge in VLSI testing.
Competence
Course prerequisites
grading Homework: 8% Programming assignment: 30% Exam: 30% Term Project: 30% Class Participation 2% prerequisites Logic Design Computer Programming
Grading Philosophy
Course schedule
Course type
Online Course Requirement
Instructor
CHIEN-MO LI
